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EE 206: Circuits I  -  Home Page & Syllabus

 

Introduction to Circuit Analysis

Fall 2013

 

EE 206 Home

Unit 1: Fundamentals

Unit 2: Kirchoff’s Circuit Laws

Unit 3: Op Amps & Thévenins

Unit 4: AC Analysis

 

Standings as of December 6, 2013

F

D

C

B

A

Test 1

1

 

 

17

33

Test 2

1

 

 

7

43

Test 3

15

 

 

15

21

Test 4

36

 

 

6

9

Mastery

1

14

22

8

6

 

 

Instructor:                    Chao You

Email:                          chao.you@ndsu.edu

Office:                         ECE 101

Office hours:               TBA

 

TA:                              Drew Taylor

Email:                          andrew.taylor@ndsu.edu

Office:                         ECE 201

Office hours:               TBA

 

Text:                            Electric Circuits (Sixth Edition), James Nilsson, Susan Riedel.

On-Line Reference:    www.BisonAcademy.com

                                    Google Electronics Tutorials

                                    edX Electronics

                                    MIT OpenCourseWare

Educating Engineers: Preparing 21st Century Leaders in the Context of New Modes of Learning

 

On-Line Quizzes:  To help prepare for the tests, there are some on-line quizzes available.  Each of you should have a password (if not, let me know and I’ll get you one.  You can also sign on as a generic student (name and password below):  Comments, suggestions, and improved quizzes are always welcome.

·         Go to www.Junoed.com

·         Name: ECE Student

·         Password: Welcome

·         Sample Problems from www.JunoEd.com:

o   EE Fundamentals

o   Voltage Nodes

o   Current Loops

 

Course Description:  Linear electric circuits.  Component models, circuit laws, transient analysis, design issues, computer tools. 3 lectures, 1 two-hour recitation/laboratory.  Prereq: MATH 166 with a grade of C or better. Co-req: MATH 129 and PHYS 252. F, S.

 

Syllabus:

 

 

Date

Topic Notes

Lecture Videos & Handouts

Short Videos & Reading

Homework

Labs

Tests & Solutions

M

Aug 26

Holiday

Circuit Fundamentals
@ Ryerson (106 min)

 

 

 

EE Fundamentals
Sample Problems

 

--- New ---

 

Test 1A Solutions

Test 1B Solutions

Test 1C Solutions

Test 1D Solutions

Test 1E Solutions

Test 1F Solutions

Test 1G Solutions

Test 1H Solutions

Test 1I Solutions

Test 1J Solutions

Test 1K Solutions

Test 1L Solutions

Test 1M Solutions

 

--- Old ---

Resistors 1  -  Solution

Resistors 2  -  Solution

Resistors 3  -  Solution

Resistors 4  -  Solution

Resistors 5  -  Solution

W

Aug 28

Introduction & Syllabus

Chapter 1

F

Aug 30

SI Units, Voltage, Current, Power

Chapter 2.2, 2.3

Basics of Electricity

Circuit Notation

Worksheet 01

Ultra Data

Coppertop Data

M

Sep 2

Holiday

 

Chapter 3.5

Lab 1

W

Sep 4

Kirchoff’s Laws

Chapter 2.4, 2.5

Kirchoff’s Voltage Law

Kirchoff’s Current Law

Worksheet 02

F

Sep 6

MATLAB and MultiSim

MATLAB Demo

MultiSim Demo

M

Sep 9

Resistors in series, parallel

Chapter 3.1, 3.2

Resistors in Series & Parallel

Worksheet 03

Lab 2

W

Sep 11

Voltage and Current Division

Chapter 3.3, 3.4

Potentiometers, Voltage
& Current Division

Worksheet 04

Solutions

F

Sep 13

Test (1)

 

M

Sep 16

Voltage Nodes

Node Voltage @ Ryerson

Supernodes @ Ryerson

Chapter 4.2, 4.4

Node Voltage & Supernodes

KCL Review: Part 1, Part 2

Worksheet 05

Lab 3

KCL Sample Problems

KVL Sample Problems

 

--- New ---

 

Test 2A Solutions

Test 2B Solutions

Test 2C Solutions

Test 2D Solutions

Test 2E Solutions

Test 2F Solutions

Test 2G Solutions

Test 2H Solutions

Test 2I Solutions

Test 2J Solutions

Test 2K Solutions

 

--- Old ---

KCL 3  -  KVL 3

KCL 4  -  KVL 4

KCL 5  -  KVL 5

KCL 6  -  KVL 6

KCL 8  -  KVL 8

KVL 10

 

 

 

W

Sep 18

Voltage Nodes with Dependent Sources

Chapter 4.3, 4.4

Node Voltage with

Dependent Sources

 

F

Sep 20

Test (1)

 

M

Sep 23

Mesh Currents

Mesh & Supermesh
@ Ryerson

Chapter 4.5, 4.7

Mesh Current & Supermeshes

Worksheet 06

Solutions

Lab 4

W

Sep 25

Mesh currents with Dependent Sources

Chapter 4.6, 4.7

Mesh Current & Dependent Sources

F

Sep 27

Test (1, 2)

 

 

M

Sep 30

Design Project 1

 

DigiKey Resistors

AvNet Resistors

Google Resistors

Design 01

Report template

W

Oct 2

Design Review 1

 

F

Oct 4

Test (1, 2)

 

 

M

Oct 7

Operational Amplifier

Handout: Op Amps

 

Op Amps @ MIT (53 min)

 

Op Amps Cont. @ MIT (50 min)

Chapter 5.1, 5.2

Op Amps @ MIT

Op Amps @ Engineering Videos (28 min)

Worksheet 07

Lab 5

Test 3 Study Guide

 

--- New ---

 

Test 3A Solutions

Test 3B Solutions

Test 3C Solutions

Test 3D Solutions

Test 3E Solutions

Test 3F Solutions

Test 3G Solutions

Test 3H Solutions

 

--- Old ---

 

Op Amp 10  -  Thevenin 06

Op Amp 11  -  Thevenin 08

Op Amp 12  -  Thevenin 10

Op Amp 13  -  Thevenin 11

Op Amp 14  -  Thevenin 12

Op Amp 15

W

Oct 9

Ideal Op-Amp Model

Chapter 5.3-6

Non-inverting Op Amp

 

F

Oct 11

Test (1, 2)

 

 

M

Oct 14

Design Project 2

 

Amplifiers &

Instrumentation Amplifiers

Design 02

Report template

 

W

Oct 16

Design Review 2

Schmitt Triggers

 

F

Oct 18

Test (1, 2)

 

 

M

Oct 21

Thevenin Equivalent & Load Lines

Handout: Thevenin Equivalents

 

Thevenin/Norton Eq. @ Ryerson (Watch until 42:43)

Chapter 4.9, 4.10

Worksheet 08

Thévenin Eq. Solutions

Lab 6

W

Oct 23

Thevenin Equivalent with Dependent Sources

Chapter 4.11

Worksheet 09

F

Oct 25

Test (1, 2, 3)

 

 

M

Oct 28

Max Power Transfer

Handout: Maximum Power Transfer

 

Maximum Power Transfer
@ Ryerson
(15 min)

Chapter 4.12

 

 

W

Oct 30

 

 

 

F

Nov 1

Test (1, 2, 3)

 

 

M

Nov 4

The Number j and Other Falsehoods

Handout: Complex Numbers & Phasors

 

Handout 2: More Phasors

 

Complex Numbers
@ Ryerson
(42 min)

 

Worksheet 10

Solutions

 

Test 4 Study Guide

 

--- New ---

 

Test 4A Solutions

Test 4B Solutions

Test 4C Solutions

Test 4D Solutions

W

Nov 6

Phasors

Wikibooks Notes

Chapter 9.3

 

F

Nov 8

Test (1, 2, 3)

 

 

M

Nov 11

Holiday

Superposition
@ Ryerson
(52 min)

 

Worksheet 11

 

W

Nov 13

Superposition

Chapter 4.13

 

F

Nov 15

Test (1, 2, 3)

 

 

M

Nov 18

Capacitors

Capacitor Transient Response

Handout: Capacitors & Inductors

 

RC / RL Time Constants

@ All About Circuits (14 min)

 

 

Chapter 6.2, 6.3; (7.2, 7.3)

Capacitors @ Ryerson (99 min)

Worksheet 12

 

W

Nov 20

Inductors

Inductor Transient Response

Chapter 6.1, 6.3; (7.1, 7.3)

Inductors @ Ryerson (91 min)

 

F

Nov 22

Test (1, 2, 3)

 

 

M

Nov 25

Steady-state AC Analysis

Handout: AC Analysis

 

AC Circuits

 @ Ryerson (52 min)

Note: The first twenty minutes
is a review on sinusoids.

Chapter 9.1, 9.4

Worksheet 13

 

W

Nov 27

AC Analysis: RLC Circuits

Chapter 9.5, 9.8, 9.9

 

F

Nov 29

Holiday

 

 

M

Dec 2

Thevenin RLC Equivalents

 

Chapter 9.7

Worksheet 14

Lab 7

W

Dec 4

AC Analysis: Op Amps

Worksheet 15

F

Dec 6

Test (1, 2, 3, 4)

 

 

M

Dec 9

Week of the Dead

 

 

 

W

Dec 11

 

F

Dec 13

Test (1, 2, 3, 4)

 

 

 

Dec 16

Final Exam @ 1 PM

370 Lebedeff

 

 

 

 

 

                       

 

 

Course Design:

A sizable number of classes you've taken consist of lectures and regurgitation.  If you can regurgitate what you heard in class 90% accurately, you get an A.  This style of class works up to level 2 in Bloom's taxonomy

·         Level 1:  Memorization

·         Level 2:  Understanding

·         Level 3:  Application (solving problems)

·         Level 4:  Analysis (solving multi-step problems)

·         Level 5:  Evaluation (assessing if your answer is reasonable)

·         Level 6:  Creating (multi-step design to meet requirements)

 

In EE 206, we try to go up to level 3:  you are asked to apply what you have learned to solve various circuits, as well as dabble in level 4:  design a circuit to do a given function (such as measure your heart beat.)

·         Freshmen and sophomore level courses often focus on level 1 and 2 learning (lecture - regurgitation classes.)

·         Junior-level courses in ECE tend to focus on level 3 learning.

·         Senior-level courses in ECE tend to focus on level 3 and level 4 learning.

·         Senior-design and graduate-level courses are where you get in to level 5 and 6 - which are the fun areas of ECE.

Memorization doesn't work in this class (or for the rest of ECE for that matter):  you can't memorize every circuit possible.  Instead, the techniques are all important:  the techniques we cover in this class can be applied to just about any circuit.

 

There are six main techniques we'll be covering in EE 206.  The first three are core concepts you must master to get a C or higher.:

·         EE Fundamentals:  Definitions, symbols, V=IR

·         Voltage Nodes:  A technique used to find the voltages and currents in a circuit

·         Current Loops:  Another technique used to find currents and voltages

·         Thevenin:  A way to simplify a circuit using Load Line technques

·         Op-Amps:  How to use voltage node techniques with an op-amp circuit

·         RL and RC Circuits:  Solving first-order differential equations to solve for voltages and currents in an RL and RC circuit.

·         Phasors:  Steady-state AC analysis of circuits.

 

Each day, there will be a 10-15 minute presentation (lecture) on different aspects of these topics.  The remainder of the class will be spent practicing these techniques.

A second problem with traditional classes is you're only tested on a given topic once. If you get it 70% right, you don't have a chance to retake the test.

 

This is a problem for two reasons.  First, your grade should reflect your knowledge and skills at the end of the semester.  Second, the techniques covered in EE 206 depend upon your mastery of previous skills as shown above.  It likewise is somewhat pointless moving on to Thevenin equivalent circuits if you don't understand voltage nodes of some of the fundamentals.

 

To deal with this problem, grading in EE 206 will be somewhat different.

·         There will be a test every Friday.

·         Grading for the midterms is binary:  if you demonstrate mastery (score 80% or 90% for A level), you pass that test.  You can retake the exam each Friday until the end of the semester.

·         Grading for the entire course depends upon how many areas you have passed after the final exam:

 

 

Grade

# Concept Test Passed

Lab

A

Score >90% on 4 tests

8 Labs

B

Score >80% on 4 tests

8 Labs

C

Score >80% on 3 tests

6 Labs

D

Score >80% on 2 tests

4 Labs

F

0 - 1

-

 

 

 

Legal Stuff:

 

Special Needs - Any students with disabilities or other special needs, who need special accommodations in this course are invited to share these concerns or requests with the instructor as soon as possible.

 

Academic Honesty - All work in this course must be completed in a manner consistent with NDSU University Senate Policy, Section 335: Code of Academic Responsibility and Conduct. Violation of this policy will result in receipt of a failing grade.

 

ECE Honor Code:  On my honor I will not give nor receive unauthorized assistance in completing assignments and work submitted for review or assessment. Furthermore, I understand the requirements in the College of Engineering and Architecture Honor System and accept the responsibility I have to complete all my work with complete integrity.